The invention relates to an integrating A/D converter, comprising                a measuring voltage input for an analog measuring voltage that is to be digitized, which is connected via a measuring resistor to the inverting input of an integrator,        a first reference voltage input for a first reference voltage and a second reference voltage input for a second reference voltage,        a first reference voltage switch configured to alternatively connect the first and the second reference voltage inputs via a first reference resistor to the inverting input of the integrator,        a comparator connected downstream of the integrator and configured to compare a test voltage applied to the comparator test voltage input thereof with a comparator reference voltage applied to the comparator reference voltage input thereof, wherein the comparator test voltage input is connected to the output of the integrator, and        a control device which is configured to actuate the first reference voltage switch in a clocked manner and to measure time intervals between individual switching processes.        
Analog-to-digital converters of this type (commonly referred to in the art as A/D converters) which serve to convert an analog measuring voltage into a digital signal are well known. A circuit diagram showing the principle of an A/D converter 10 of this type is shown in FIG. 1. The “heart” of the A/D converter 10 is the integrator 12, which comprises an operational amplifier with an inverting input 122, a non-inverting input 123 and an output 124, as well as a capacitor 125 which is connected between the inverting input 122 and the output 124 of the operational amplifier 122. The non-inverting input 123 of the operational amplifier 121 is connected to a reference voltage, particularly to ground. The inverting input 122 is connected via the measuring resistor RM to the measuring voltage input 14 to which the measuring voltage UM to is applied during operation. Furthermore, the inverting input 122 is connected via a reference resistor Rref to the reference voltage switch 16 which, depending on the switch setting, electrically connects either the first reference voltage input 18 or the second reference voltage input 20. A reference voltage Uref1 or Uref2 is applied to the reference voltage inputs 18, 20, respectively, which inputs typically can have mutually inverted polarity and the same or different voltage values.
Particularly in the case of monopolar measuring voltages UM, one of the reference voltages can also be zero, i.e. the corresponding reference voltage input is open or connected to ground. The integrator output 126 is connected to the test voltage input 221 of a comparator 22, the reference voltage input 222 of which is connected to a comparator reference voltage, which e.g. can be ground. The comparator 22 outputs a signal or a signal change at its output 223 in each case, when the test voltage applied to the test voltage input 221 corresponds to the reference voltage applied to the reference voltage input 222. The comparator output signal is fed back as the switching signal, via a control device 40, to the reference voltage switch 16.
An A/D converter of this type operates as follows: In a first phase of a measuring clock cycle T, the reference voltage switch 16 is switched such that the first reference voltage input 18 is connected. During this phase, the integrator integrates the sum of the measuring current IM, which results from the drop in the measuring voltage UM to across the measuring resistor RM, and the reference current Iref1, which results from the drop in the first reference voltage Uref1 across the reference resistor Rref. After a time t1 pre-defined by the control device 40, the reference voltage switch 16 switches over, so that the first reference voltage input 18 is disconnected and the second reference voltage input 20 is connected. Now the integrator deintegrates the sum of the measuring current IM and the reference current Iref2, which results from the drop in the second reference voltage Uref2 across the reference resistor Rref.
In this example, the polarities of the measuring voltage UM and the first reference voltage Uref1 are opposite and the polarities of the measuring voltage UM and the second reference voltage Uref2 are the same. The integrated or deintegrated voltage respectively lies at the integrator output 126 and therefore at the test voltage input 221 of the comparator 22. This second, or deintegration, phase has a duration τ. As soon as the integrator voltage is fully deintegrated, a comparator signal is output which is used by the control device 40 to switch over the reference voltage switch 16 once more and to begin a new measuring clock cycle. Furthermore, the control device 40, which during the preceding measuring clock cycle T has measured the durations of the two measuring clock cycle phases t1=T−τ and τ and, in particular, has calculated the ratio of the duration of the second measuring phase τ to the overall duration T of the preceding measuring clock cycle, i.e. the duty factor δ=τ/T, can output a corresponding numerical value which is a measure of the measuring voltage UM applied during the measuring clock cycle.
From DE 28 21 146 B2, there is known an integrating A/D converter wherein the reference voltage is configured as a voltage partially overlaid with the input voltage making use of an inverting amplifier.
From U.S. Pat. No. 4,270,119, there is known an integrating A/D converter wherein, in the reference branch, an inverted reference voltage is overlaid.
From GB 2 120 481 A, there is known an integrating A/D converter wherein a sensor calibration or linearization is undertaken by connecting a resistor between the input voltage and the reference voltage.
A disadvantage of the known A/D converters is the non-linear dependency of the power loss on the duty factor δ and thus on the size of the measuring voltage, i.e. on the measured value itself. In particular, the power loss can be calculated as a function of the duty factor δ as follows
  P  =                    δ        2            ⁢                        R          M                ⁡                  (                                    I                              ref                ⁢                                                                  ⁢                1                            2                        +                                          I                2                            ⁢                              r                                  ef                  ⁢                                                                          ⁢                  2                                                      +                          2              ⁢                              I                                  ref                  ⁢                                                                          ⁢                  1                                            ⁢                              I                                  ref                  ⁢                                                                          ⁢                  2                                                              )                      -          δ      ⁡              [                                            R              M                        ⁡                          (                                                I                                      ref                    ⁢                                                                                  ⁢                    2                                    2                                +                                  2                  ⁢                                      I                                          ref                      ⁢                                                                                          ⁢                      1                                                        ⁢                                      I                                          ref                      ⁢                                                                                          ⁢                      2                                                                                  )                                +                                    R              ref                        ⁡                          (                                                I                                      ref                    ⁢                                                                                  ⁢                    2                                    2                                -                                  I                                      ref                    ⁢                                                                                  ⁢                    1                                    2                                            )                                      ]              +                  R        M            ⁡              (                              I                          ref              ⁢                                                          ⁢              2                        2                    +                      2            ⁢                          I                              ref                ⁢                                                                  ⁢                1                                      ⁢                          I                              ref                ⁢                                                                  ⁢                2                                                    )              +                  R        ref            ⁢              I                  ref          ⁢                                          ⁢          2                2            
For many precision measurements, such a non-linear dependency of the A/D converter on the variable to be digitized is not acceptable. An example is the precision weighing devices which operate according to the force compensation principle wherein the measuring voltage UM applied to the measuring voltage input 14 is proportional to the force that acts on a weighing sensor. Measuring value-dependent power losses in the A/D converter lead to measuring value-dependent heating which, in turn, exerts an influence on temperature-sensitive elements of the electronics with the consequence that systematic measuring value-dependent measuring errors can arise.